DEPOGIT: Dense power-ground interconnect architecture for physical design integrity

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2004, Pages 517-522

  Kurokawa, Atsushi ^a   Ono, Nobuto ^b   Kage, Tetsuro ^a   Masuda, Hiroo ^a  

^a Semiconduct Technol Acad Res C   (Japan)

^b SII EDA Technologies Inc   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

INTERCONNECT ARCHITECTURE; POWER GRIDS; POWER GROUND INTERCONNECT (PGI); SIGNAL INTEGRITY (SI);

ELECTRIC WIRE; INTEGRATED CIRCUIT LAYOUT; POWER SUPPLY CIRCUITS; SIGNAL INTERFERENCE; SIGNAL PROCESSING; SPURIOUS SIGNAL NOISE;

VLSI CIRCUITS;

EID: 2442544409     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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