-
1
-
-
34748823693
-
The transient response of damped linear networks with particular regard to wideband amplifiers
-
Jan.
-
W. C. Elmore, "The Transient Response of Damped Linear Networks with Particular Regard to Wideband Amplifiers," Journal of Applied Physics, 19, Jan. 1948, pp. 55-63.
-
(1948)
Journal of Applied Physics
, vol.19
, pp. 55-63
-
-
Elmore, W.C.1
-
3
-
-
0024906813
-
Modeling the driving-point characteristic of resistive interconnect for accurate delay estimation
-
P. R. O'Brien and T. L. Savarino, "Modeling the Driving-Point Characteristic of Resistive Interconnect for Accurate Delay Estimation," Proc. of IEEE Int'l Conf. on Computer Aided Design, 1989, pp. 512-515.
-
(1989)
Proc. of IEEE Int'l Conf. on Computer Aided Design
, pp. 512-515
-
-
O'Brien, P.R.1
Savarino, T.L.2
-
10
-
-
0028756124
-
Modeling the "effective capacitance" for the RC interconnect of CMOS gates
-
J. Qian, S. Pullela, and L. Pillage, "Modeling the "Effective Capacitance" for the RC Interconnect of CMOS gates," IEEE Trans. on Computer Aided Design of VLSI Circuits and Systems, vol. 13 (1994), pp. 1526-1535.
-
(1994)
IEEE Trans. on Computer Aided Design of VLSI Circuits and Systems
, vol.13
, pp. 1526-1535
-
-
Qian, J.1
Pullela, S.2
Pillage, L.3
-
12
-
-
0031631926
-
A new algorithm for computing the "effective capacitance" in deep sub-micron circuits
-
June
-
R. Macys, S. McCormick, "A New Algorithm for Computing the "Effective Capacitance" in Deep Sub-micron Circuits," Proc. of IEEE Custom Integrated Circuits Conference, June 1998, pp. 313-316.
-
(1998)
Proc. of IEEE Custom Integrated Circuits Conference
, pp. 313-316
-
-
Macys, R.1
McCormick, S.2
-
14
-
-
0030141612
-
Performance computation for pre-characterized CMOS gates with RC loads
-
May
-
F. Dartu, N. Menzes, and L.T. Pileggi," Performance computation for pre-characterized CMOS gates with RC loads," IEEE Transaction on CAD, vol. 15, pp. 544-553, May 1996
-
(1996)
IEEE Transaction on CAD
, vol.15
, pp. 544-553
-
-
Dartu, F.1
Menzes, N.2
Pileggi, L.T.3
-
15
-
-
0030686019
-
Calculating worst-case gate delays due to dominant capacitance coupling
-
June
-
F. Dartu, L.T. Pileggi, "Calculating worst-case gate delays due to dominant capacitance coupling," Proc. Of Design Automation Conference, pp 46-51, June 1997
-
(1997)
Proc. Of Design Automation Conference
, pp. 46-51
-
-
Dartu, F.1
Pileggi, L.T.2
-
16
-
-
0036396989
-
Accurate and efficient static timing analysis with crosstalk
-
I.D. Huang, S.K. Gupta, and M.A. Breuer, "Accurate and Efficient Static Timing Analysis with Crosstalk," Proc. Of International Conference on Computer Design, pp: 265-272, 2002
-
(2002)
Proc. Of International Conference on Computer Design
, pp. 265-272
-
-
Huang, I.D.1
Gupta, S.K.2
Breuer, M.A.3
-
17
-
-
84949743939
-
Improved crosstalk modeling for noise constrained interconnect optimization
-
J.Cong, D.Z. Pan, and P.V. Srinivas, "Improved crosstalk modeling for noise constrained interconnect optimization," Proc of Asia and South Pacific Design Automation Conference, pp: 373 -378, 2001
-
(2001)
Proc of Asia and South Pacific Design Automation Conference
, pp. 373-378
-
-
Cong, J.1
Pan, D.Z.2
Srinivas, P.V.3
-
20
-
-
79955052276
-
Fast and accurate wire delay estimation for physical synthesis of large ASICs
-
R.Puri, D.S. Kung, A.D. Drumm, "Fast and Accurate Wire Delay Estimation for Physical Synthesis of Large ASICs," Proc. of GLSVLSI, 2002
-
(2002)
Proc. of GLSVLSI
-
-
Puri, R.1
Kung, D.S.2
Drumm, A.D.3
-
21
-
-
0034483941
-
Miller factor for gate-level coupling delay calculation
-
P. Chen, D.A. Kirkpatrick, K. Keutzer, "Miller Factor for Gate-Level Coupling Delay Calculation", Proc. of ICCAD, pp 68-74, 2000
-
(2000)
Proc. of ICCAD
, pp. 68-74
-
-
Chen, P.1
Kirkpatrick, D.A.2
Keutzer, K.3
-
23
-
-
84862369140
-
-
http://mathworld.wolfram.com
-
-
-
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