An "Effective" capacitance based delay metric for RC interconnect

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2000-January, Issue , 2000, Pages 229-234

  Kashyap, Chandramouli V ^a   Alpert, Charles J ^a   Devgan, Anirudh ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; SHIELDING; APPROXIMATION THEORY; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; DELAY CIRCUITS; ELECTRIC RESISTANCE; ELECTRIC SHIELDING; ESTIMATION; PROBABILITY DENSITY FUNCTION;

COMPUTATION OF MOMENTS; DELAY ESTIMATION; DELAY METRIC; EFFECTIVE CAPACITANCE; ITS EFFICIENCIES; OPTIMIZATION LOOP; PHYSICAL-DESIGN TOOLS; TIMING-DRIVEN;

COMPUTER AIDED DESIGN; INTERCONNECTION NETWORKS;

EFFECTIVE CAPACITANCE METRIC; ELMORE DELAY METRIC; SOFTWARE PACKAGE SPICE;

EID: 0034481270     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2000.896479     Document Type: Conference Paper

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