Phase noise in digital frequency dividers

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 5, 2004, Pages 775-784

  Levantino, Salvatore ^a   Romanò, Luca ^a   Pellerano, Stefano ^a   Samori, Carlo ^a   Lacaita, Andrea L ^a,b  

^a POLITECNICO DI MILANO   (Italy)

^b CNR   (Italy)

Author keywords

CMOS integrated circuit; Frequency dividers; Frequency synthesizer; Jitter; Phase noise; Phase locked loops (PLLs)

Indexed keywords

FLICKER NOISE; PHASE NOISE; PHASE SPECTRA; POWER CONSUMPTION;

CMOS INTEGRATED CIRCUITS; FREQUENCY SYNTHESIZERS; JITTER; PHASE LOCKED LOOPS; SPURIOUS SIGNAL NOISE; WHITE NOISE;

FREQUENCY DIVIDING CIRCUITS;

EID: 2442425567     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.826338     Document Type: Article

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