A 1.4GHz differential low-noise CMOS frequency synthesizer using a wideband PLL architecture

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 204-205

  Lin, L ^a   Tee, L ^a   Gray, P R ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; CRYSTAL OSCILLATORS; FLIP FLOP CIRCUITS; FREQUENCY DIVIDING CIRCUITS; PHASE LOCKED LOOPS; RESONATORS; TRANSCEIVERS; VARIABLE FREQUENCY OSCILLATORS; VOICE/DATA COMMUNICATION SYSTEMS;

WIRELESS TRANSRECEIVERS;

FREQUENCY SYNTHESIZERS;

EID: 0034431134     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Future directions in silicon IC's for RF personal communications
2. A 1.9GHz wide-band IF double conversion CMOS receiver for cordless telephone applications
3. A fully integrated CMOS DCS-1800 frequency synthesizer
4. A low-noise 1.6GHz CMOS PLL with on-chip loop filter
5. A 900MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications