A New Schmitt Trigger Circuit in a 0.13-μm 1/2.5-V CMOS Process to Receive 3.3-V Input Signals

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 52, Issue 7, 2005, Pages 361-365

  Chen, Shih Lun ^a   Ker, Ming Dou ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Gate oxide reliability; input output (I O); mixed voltage interface; Schmitt trigger

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; GATES (TRANSISTOR); SPURIOUS SIGNAL NOISE; THRESHOLD VOLTAGE;

GATE OXIDE RELIABILITY; MIXED VOLTAGE INTERFACE; SCHMITT TRIGGER CIRCUIT;

TRIGGER CIRCUITS;

EID: 24044523809     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2005.850409     Document Type: Article

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