Design of 2.5V/5V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2003, Pages

  Ker, Ming Dou ^a   Tsai, Chia Sheng ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; LEAKAGE CURRENTS; POWER SUPPLY CIRCUITS; SEMICONDUCTING SILICON;

COMPLEX BIAS CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 0038420756     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

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