A new Schmitt trigger circuit in A 0.13 μm 1/2.5 V CMOS process to receive 3.3 V input signals

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2004, Pages

  Chen, Shih Lun ^a   Ker, Ming Dou ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC INVERTERS; ELECTRIC NETWORK ANALYSIS; ELECTRIC POTENTIAL; GATES (TRANSISTOR); SIGNAL PROCESSING; TRIGGER CIRCUITS;

GATE VOLTAGE; GATE-OXIDE STRESS; SCHMITT TRIGGER CIRCUITS; SIGNAL ENVIRONMENT;

CMOS INTEGRATED CIRCUITS;

EID: 4344668695     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

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