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Volumn 52, Issue 7, 2005, Pages 1548-1554

Tunnel DCIV extraction of dopant-impurity concentration, oxide thickness, and length in the channel and extension regions of ultrathin gate-oxide MOS transistors

Author keywords

Channel length; Extension length; Oxide thickness; Surface dopant impurity concentration; Tunnel direct current current voltage (TDCIV); Ultrathin gate oxide

Indexed keywords

ALGORITHMS; CURRENT VOLTAGE CHARACTERISTICS; ELECTRON TUNNELING; GATES (TRANSISTOR); MATHEMATICAL MODELS; SEMICONDUCTOR JUNCTIONS;

EID: 23944502117     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.850623     Document Type: Article
Times cited : (2)

References (17)
  • 1
    • 33645444383 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors. Semiconductor Industry Association (SIA), San Jose, CA. [Onlinel]. Available
    • (2001) International Technology Roadmap for Semiconductors. Semiconductor Industry Association (SIA), San Jose, CA. [Onlinel]. Available: http://pubic.itrs.net/Files/20011TRS/FEP.pdf
    • (2001)
  • 2
    • 33645443568 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors. Semiconductor Industry Association (SIA), San Jose, CA. [Online]. Available
    • (2003) International Technology Roadmap for Semiconductors. Semiconductor Industry Association (SIA), San Jose, CA. [Online]. Available: http://pubic.itrs.net/Files/2003ITRS/Metrology2003.pdf
    • (2003)
  • 4
    • 0032265856 scopus 로고    scopus 로고
    • "Two-dimensional dopant profiling of a 60 nm gate length nMOSFET using Scanning Capacitance Microscopy"
    • W. Timp, M. L. O'Malley, R. N. Kleiman, and J. P. Garno, "Two-dimensional dopant profiling of a 60 nm gate length nMOSFET using Scanning Capacitance Microscopy," in IEDM Tech. Dig., 1998, pp. 555-558.
    • (1998) IEDM Tech. Dig. , pp. 555-558
    • Timp, W.1    O'Malley, M.L.2    Kleiman, R.N.3    Garno, J.P.4
  • 5
    • 0035476926 scopus 로고    scopus 로고
    • "Lateral profiling of impurity surface concentration in submicron metal-oxide-silicon transistors"
    • Oct.
    • Y. Wang and C.-T. Sah, "Lateral profiling of impurity surface concentration in submicron metal-oxide-silicon transistors," J. Appl. Phys., vol. 90, no. 7, pp. 3539-3550, Oct. 2001.
    • (2001) J. Appl. Phys. , vol.90 , Issue.7 , pp. 3539-3550
    • Wang, Y.1    Sah, C.-T.2
  • 6
    • 79952367287 scopus 로고    scopus 로고
    • "DCIV diagnosis for submicron MOS transistor design, process, reliability and manufacturing"
    • Oct. [Online]. Available
    • C.-T. Sah, "DCIV diagnosis for submicron MOS transistor design, process, reliability and manufacturing," in Proc. 6th Int. Conf. Solid-State and Integrated-Circuit Technology, vol. 1, Oct. 2001, pp. 1-15. [Online]. Available: http://ieeexplore.ieee.org/xpl/ RecentCon.jsp?puNumber=7712.
    • (2001) Proc. 6th Int. Conf. Solid-State and Integrated-Circuit Technology , vol.1 , pp. 1-15
    • Sah, C.-T.1
  • 7
    • 33645449217 scopus 로고    scopus 로고
    • Doping profile calibration of 0.18 mm CMOS technology and compact model development for RF calibrations
    • presented at The Advanced Devices and Technologies: Known Device Review. [Online]. Available
    • R. W. Dutton. Doping profile calibration of 0.18 mm CMOS technology and compact model development for RF calibrations, presented at The Advanced Devices and Technologies: Known Device Review. [Online]. Available: http://www.src.org/member/event/e001959_agenda.asp
    • Dutton, R.W.1
  • 8
    • 0036540252 scopus 로고    scopus 로고
    • "Inverse modeling of sub-100 nm MOSFETs using I-V and C-V"
    • Apr.
    • I. J. Djomehri and D. A. Antoniadis, "Inverse modeling of sub-100 nm MOSFETs using I-V and C-V," IEEE Trans. Electron Devices, vol. 49, no. 4, pp. 568-575, Apr. 2002.
    • (2002) IEEE Trans. Electron Devices , vol.49 , Issue.4 , pp. 568-575
    • Djomehri, I.J.1    Antoniadis, D.A.2
  • 9
    • 33645424603 scopus 로고    scopus 로고
    • "Gate tunnel current diagnosis of very thin oxides"
    • Semiconductor Research Corp., Rep. C99431, Nov
    • C.-T Sah, "Gate tunnel current diagnosis of very thin oxides," Semiconductor Research Corp., Rep. C99431, Nov. 1999.
    • (1999)
    • Sah, C.-T.1
  • 10
    • 3142674984 scopus 로고    scopus 로고
    • "Tunnel DCIV diagnosis of ultrathin gate oxide metal-oxide-silicon Transistors"
    • B. B. Jie, K. F. Lo, E. Quek, S. Chu, and C.-T. Sah, "Tunnel DCIV diagnosis of ultrathin gate oxide metal-oxide-silicon Transistors," Semicond. Sci. Technol., vol. 19, 2004.
    • (2004) Semicond. Sci. Technol. , vol.19
    • Jie, B.B.1    Lo, K.F.2    Quek, E.3    Chu, S.4    Sah, C.-T.5
  • 11
    • 0033725602 scopus 로고    scopus 로고
    • "Modeling gate and substrate currents due to conduction- and valence-band electron and hole tuneling"
    • W.-C. Lee and C. Hu, "Modeling gate and substrate currents due to conduction- and valence-band electron and hole tuneling," in Symp. VLSI Tech. Dig., 2000, pp. 198-199.
    • (2000) Symp. VLSI Tech. Dig. , pp. 198-199
    • Lee, W.-C.1    Hu, C.2
  • 13
    • 33645431046 scopus 로고    scopus 로고
    • "VFYV measurements of very thin gate oxides"
    • Semiconductor Research Corp., Rep. C99430
    • C.-T. Sah, "VFYV measurements of very thin gate oxides," Semiconductor Research Corp., Rep. C99430, 1999.
    • (1999)
    • Sah, C.-T.1
  • 14
    • 0031177159 scopus 로고    scopus 로고
    • "Thin oxide thickness extrapolation from capacitance-voltage measurements"
    • Jul.
    • S. V. Walstra and C.-T. Sah, "Thin oxide thickness extrapolation from capacitance-voltage measurements," IEEE Trans. Electron Devices, vol. 44, no. 7, pp. 1136-1142, Jul. 1997.
    • (1997) IEEE Trans. Electron Devices , vol.44 , Issue.7 , pp. 1136-1142
    • Walstra, S.V.1    Sah, C.-T.2
  • 15
    • 0031140867 scopus 로고    scopus 로고
    • "Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFETs"
    • May
    • S. H. Lo, D. A. Buchanan, Y. Taur, and W. Wang, "Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFETs," IEEE Electron Device Lett., vol. 18, no. 5, pp. 209-211, May 1997.
    • (1997) IEEE Electron Device Lett. , vol.18 , Issue.5 , pp. 209-211
    • Lo, S.H.1    Buchanan, D.A.2    Taur, Y.3    Wang, W.4
  • 16
    • 0033579745 scopus 로고    scopus 로고
    • "Analytic model for direct tunneling current in polycrystalline silicon-gate metal-oxide-semiconductor devices"
    • Jan.
    • L. F. Register, E. Rosenbaum, and K. Yang, "Analytic model for direct tunneling current in polycrystalline silicon-gate metal-oxide-semiconductor devices," Appl. Phys. Lett., vol. 74, no. 1, pp. 457-459, Jan. 1999.
    • (1999) Appl. Phys. Lett. , vol.74 , Issue.1 , pp. 457-459
    • Register, L.F.1    Rosenbaum, E.2    Yang, K.3
  • 17
    • 0000367796 scopus 로고    scopus 로고
    • "Gate tunneling currents in ultrathin oxide metal-oxide-silicon transistors"
    • Feb.
    • J. Cai and C.-T Sah, "Gate tunneling currents in ultrathin oxide metal-oxide-silicon transistors," J. Appl. Phys., vol. 89, no. 4, pp. 2272-2285, Feb. 2001.
    • (2001) J. Appl. Phys. , vol.89 , Issue.4 , pp. 2272-2285
    • Cai, J.1    Sah, C.-T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.