High-performance on-chip transformers

IEEE Electron Device Letters

Volumn 26, Issue 8, 2005, Pages 557-559

  Chong, Kyuchul ^a   Xie, Ya Hong ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Eddy current; Mixed signal IC; On chip transformer; Porous Si; Substrate effect

Indexed keywords

CAPACITANCE; EDDY CURRENTS; NATURAL FREQUENCIES; OPTIMIZATION; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; POROUS SILICON; SUBSTRATES;

MIXED SIGNAL IC; ON CHIP TRANSFORMER; SUBSTRATE EFFECT;

ELECTRIC TRANSFORMERS;

EID: 23844447941     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2005.851817     Document Type: Article

References (13)

1. J. J. Zhou and D. J. Allstot, "Monolithic transformers and their application in a differential CMOS RF low-noise amplifier," IEEE J. Solid-State Circuits, no. 12, pp. 2020-2027, Dec. 1998.
2. H. Jiang, Z. Li, and N. C. Tien, "Reducing silicon-substrate parasitics of on-chip transformers," in Proc. IEEE Micro Electro Mechanical Systems, Las Vegas, NV, Jan. 2002, pp. 649-652.
3. R. P. Ribas, J. Lescot, J.-L. Leclercq, J. M. Karam, and F. Ndagijimana, "Micromachined microwave planar spiral inductors and transformers," IEEE Trans. Microw. Theory Tech., vol. 48, no. 8, pp. 1326-1335, Aug. 2000.
4. L. T. Canham, M. R. Houlton, W. Y. Leong, C. Pickering, and J. M. Keen, "Atmospheric impregnation of porous silicon at room temperature," J. Appl. Phys., vol. 70, pp. 422-431, Jul. 1991.
5. M. Ito, K. Yamagata, H. Miyabayashi, and T. Yonehara, "Scalability potential in ELTRAN® SOI-epi wafer," in Proc. 2000 IEEE Int SOI Conf., Oct., 2-5 2000, pp. 10-11.
6. K. Chong, Y. H. Xie, K. W. Yu, D. Huang, and M. C. F. Chang, "High performance inductors integrated on porous silicon," IEEE Electron Device Lett., vol. 26, no. 2, pp. 93-95, Feb. 2005.
7. Y. H. Xie, M. R. Frei, A. J. Becker, C. A. King, D. Kossives, L. T. Gomez, and S. K. Theiss, "An approach for fabricating high-performance inductors on low-resistivity substrates," IEEE J. Solid-State Circuits, vol. 33, no. 9, pp. 1433-1438, Sep. 1998.
8. D. M. Pozar, Microwave Engineering, 2nd ed. New York: Wiley, 1998.
9. S. Jenei, K. Bart, J. C. Nauwelaers, and S. Decoutere, "Physics-based closed-form inductance expression for compact modeling of integrated spiral inductors," IEEE J. Solid-State Circuits, vol. 37, no. 1, pp. 77-80, Jan. 2002.
10. K. T. Ng, B. Rejaei, and J. N. Burghartz, "Substrate effects in monolithic RF transformers on silicon," IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 377-383, Jan. 2002.
11. K. Chong and Y. H. Xie, "Study on substrate effects of on-chip transformers," IEEE Trans. Electron Devices, 2005, to be published.
12. D. C. Laney, L. E. Larson, P. Chan, J. Malinowski, D. Harame, S. Subbanna, R. Volant, and M. Case, "Lateral microwave transformers and inductors implemented in a Si/SiGe HBT process," in IEEE MTT-S Dig., vol. 3, Jun. 1999, pp. 13-19.
13. K. Chong, X. Zhang, K.-N. Tu, D. Huang, M.-C. F. Chang, and Y.-H. Xie, "Three-dimensional substrate impedance engineering based on p-/p+ Si substrate for mixed-signal system-on-chip," IEEE Trans. Electron Devices, 2005, to be published.