Wire swizzling to reduce delay uncertainty due to capacitive coupling

Proceedings of the IEEE International Conference on VLSI Design

Volumn 17, Issue , 2004, Pages 431-436

  Gupta, Puneet ^a   Kahng, Andrew B ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUSBARS; CAPACITANCE; CROSSTALK; ELECTRIC WIRE; LOGIC DESIGN; PERTURBATION TECHNIQUES; SENSITIVITY ANALYSIS; SPURIOUS SIGNAL NOISE;

CAPACITIVE COUPLINGS; NODES; ON-CHIP BUSES; WIRE SWIZZLING;

INTEGRATED CIRCUIT LAYOUT;

EID: 2342458283     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)

1. A. B. Kahng, S. Muddu, E. Sarto and R. Sharma, "Interconnect Tuning Strategies for High Performance ICs", Proc. IEEE/ACM Design Automation and Testing in Europe, 1998.
2. P. Chen, D. K. Kirkpatrick and K. Keutzer, " Miller Factor for Gate-Level Coupling Delay Calculation", Proc. IEEE/ACM International Conference on Computer Aided Design, 2000, pp. 68-74.
3. Prashant Saxena and C.L. Liu, " A Postprocessing Algorithm for Crosstalk-Driven Wire Perturbation", IEEE Transactions on CAD of ICs and Systems, 19(6), 2000, pp 691-702.
4. Kyoung-Son Jhang, Soonhoi Ha and Chu Shik Jhon, "COP: A Crosstalk OPtimizer for Gridded Channel Routing", IEEE Transactions on CAD of ICs and Systems, 15(4), 1996, pp 424-429.
5. Ashok Vittal and Malgorzata Marek-Sadowska, "Crosstalk Reduction for VLSI", IEEE Transactions on CAD of ICs and Systems, 16(3), 1997, pp 290-298.
6. Desmond A. Kirkpatrick and Alberto L. Sangiovanni-Vincentelli, "Techniques for Crosstalk Avoidance in the Physical Design of High-Performance Digital Systems", Proc. IEEE/ACM International Conference on Computer Aided Design, 1994, pp 616-619.
7. Desmond A. Kirkpatrick and Alberto L. Sangiovanni-Vincentelli, "Digital Sensitivity: Predicting Signal Interaction using Functional Analysis", Proc. IEEE/ACM International Conference on Computer Aided Design ,1996, pp 536-541.
8. Tong Gao and C.L. Liu, "Minimum Crosstalk Channel Routing", Technical Digest Int. Conf. on CAD, 1993, pp 692-696.
9. G. Zhong, C-K Koh and K. Roy, "A Twisted-Bundle Layout Structure for Minimizing Inductive Coupling Noise", Proc. ICCAD 2000, pp. 406-411.
10. International Technology Roadmap for Semiconductors, 2001, http://public.itrs.net
11. A. B. Kahng, S. Muddu and E. Sarto, "On Switch Factor Based Analysis of Coupled RC Interconnects", Proc. ACM/IEEE Design Automation Conference, 2000, pp. 79-84.
12. Star-HSpice, http://www.synopsys.com/products/avmrg/star_hspice_ds.html
13. XYALIS, http://www.xyalis.com/ (see data sheets for the GTSmooth product; similar claims of performance-aware fill insertion are made by UbiTech, Inc., http://www.ubitechnology. com/).
14. K.E Dow, "Apparatus for improving signal transmission along parallel lines", United States Patent 5,306,967, 1994.
15. R. Dutta, Personal communication, 1998.