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Volumn 2000-January, Issue , 2000, Pages 406-411

A twisted-bundle layout structure for minimizing inductive coupling noise

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTRIC CURRENTS; FREQUENCIES; INDUCTANCE; MAGNETIC FLUX; SPURIOUS SIGNAL NOISE;

EID: 0034481106     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2000.896506     Document Type: Conference Paper
Times cited : (43)

References (17)
  • 2
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    • Clocking design and analysis for a 600-MHz Alpha microprocessor
    • November
    • D. Bailey and B. Benschneider. Clocking design and analysis for a 600-MHz Alpha microprocessor. IEEE Journal on Solid- State Circuits, 33(11): 1627-1633, November 1998.
    • (1998) IEEE Journal on Solid- State Circuits , vol.33 , Issue.11 , pp. 1627-1633
    • Bailey, D.1    Benschneider, B.2
  • 3
    • 0032629526 scopus 로고    scopus 로고
    • IC analyses including extracted inductance models
    • M. Beattie and L. Pileggi. IC analyses including extracted inductance models. In Proc. Design Automation Conf, pages 915-920, 1999.
    • (1999) Proc. Design Automation Conf , pp. 915-920
    • Beattie, M.1    Pileggi, L.2
  • 6
    • 0027795509 scopus 로고
    • Minimum crosstalk channel routing
    • T. Gao and Liu C. Minimum crosstalk channel routing. In Proc. Design Automation Conf, pages 692-696, 1993.
    • (1993) Proc. Design Automation Conf , pp. 692-696
    • Liu, C.1    Gao, T.2
  • 8
    • 0033724256 scopus 로고    scopus 로고
    • Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization
    • L. He and K. M. Lepak. Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization. In Proc. Int. Symp. on Physical Design, pages 55-60, 2000.
    • (2000) Proc. Int. Symp. on Physical Design , pp. 55-60
    • He, L.1    Lepak, K.M.2
  • 9
    • 0028498583 scopus 로고
    • FASTHENRY: A multipole-accelerated 3-D inductance extraction program
    • September
    • M. Kamon, M. I. Tsuk, and J. K. White. FASTHENRY: A multipole-accelerated 3-D inductance extraction program. IEEE Journal on Microwave Theory and Techniques, 42(9): 1750-1758, September 1994.
    • (1994) IEEE Journal on Microwave Theory and Techniques , vol.42 , Issue.9 , pp. 1750-1758
    • Kamon, M.1    Tsuk, M.I.2    White, J.K.3
  • 10
    • 0031622874 scopus 로고    scopus 로고
    • Layout based frequency dependent inductance and resistance extraction for on-chip inter-connect timing analysis
    • B. Krauter and S. Mehrotra. Layout based frequency dependent inductance and resistance extraction for on-chip interconnect timing analysis. In P.roc. Design Automation Conf, pages 303-308, 1998.
    • (1998) P.roc. Design Automation Conf , pp. 303-308
    • Krauter, B.1    Mehrotra, S.2
  • 11
    • 0031623454 scopus 로고    scopus 로고
    • Layout techniques for minimizing on-chip interconnect self inductance
    • Y. Massoud, S. Majors, T. Bustami, and J. White. Layout techniques for minimizing on-chip interconnect self inductance. In Proc. Design Automation Conf, pages 566-571, 1998.
    • (1998) Proc. Design Automation Conf , pp. 566-571
    • Massoud, Y.1    Majors, S.2    Bustami, T.3    White, J.4
  • 15
    • 0001032562 scopus 로고
    • Inductance calculation in a complex integrated circuit environment
    • September
    • A. E. Ruehli. Inductance calculation in a complex integrated circuit environment. IBM Journal of Research and Development, pages 470-481, September 1972.
    • (1972) IBM Journal of Research and Development , pp. 470-481
    • Ruehli, A.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.