COP: A crosstalk optimizer for gridded channel routing

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 15, Issue 4, 1996, Pages 424-429

  Jhang, Kyoung Son ^a,b   Ha, Soonhoi ^a   Jhon, Chu Shik ^b  

^a Hannam University   (South Korea)

^b Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CAPACITANCE; CONSTRAINT THEORY; CROSSTALK; ELECTRIC WIRE; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; OPTIMIZATION; POLYNOMIALS; SPECIFICATIONS; VLSI CIRCUITS;

CROSSTALK MINIMIZATION TECHNIQUE; CROSSTALK OPTIMIZER; GRIDDED CHANNEL ROUTING; ROUTING MODEL; TRACK PERMUTATIONS;

COMPUTER AIDED DESIGN;

EID: 0030123515     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.494705     Document Type: Article

References (10)

1. H. B. Bakoglu, Circuits, Interconnections, and Packaging for VLSI. Reading, MA: Addison-Wesley, 1990.
2. E. Barke, "Line-to-ground capacitance calculation for VLSI: A comparison," IEEE Trans. Computer-Aided Design, vol. 7, pp. 295-298, Feb. 1988.
3. T. Sakurai anil K. Tamaru, ''Simple formulas for two-and threedimensional capacitance," IEEE Trans. Electron Devices, vol. ED-30, pp. 183-185, Feb. 1983.
4. T. Gao and C. L. Liu, "Minimum crosstalk channel routing," in Proc. Int. Conf. Computer-Aided Design, Nov. 1993, pp. 692-696.
5. K. Chaudhary, A. Onozawa, and E. S. Kuh, "A spacing algorithm for performance enhancement and cross-talk reduction," in Proc. Int. Conf. Computer-Aided Design, Nov. 1993, pp. 697-702.
6. A. Onozawa, "Layout compaction with attractive and repulsive constraints," in Proc. 27th Design Automation Conf., June 1990, pp. 369-376.
7. T.-T. Ho, S. S. lyengar, and S.-Q. Zheng, "A general greedy channel routing algorithm," IEEE Trans. Computer-Aided Design, vol. 10, pp. 204-211, Feb. 1991.
8. A. Sangiovarmi-Vincentelli, M. Santomauro et al, "A new gridless channel router: Yet another channel router (YACR-IT)," in Proc. Int. Conf. Computer-Aided Design, 1984, pp. 72-75.
9. K.-S. Jhang and C. S. Jhon, "A channel router with the coupling capacitance reduction," 7994 Joint Tech. Conf. Circuits/Syst., Comput. Commun., July 1994, pp. 370-375.
10. K.-S. Jhang, "Channel routing methods for crosstalk minimization based on segment rearrangement," Ph.D. dissertation, Dept. Comput. Eng., Seoul National Univ., Seoul, Korea, Feb. 1995 (in Korean).