Room temperature operation of Si single-electron memory with self-aligned floating dot gate

Applied Physics Letters

Volumn 70, Issue 13, 1997, Pages 1742-1744

  Nakajima, Anri ^a   Futatsugi, Toshiro ^a   Kosemura, Kinjiro ^a   Fukano, Tetsu ^a   Yokoyama, Naoki ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0001551483     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.118653     Document Type: Article

References (5)

1. K. Yano, T. Ishii, T. Hashimoto, T. Kobayashi, F. Murai, and K. Seki, IEEE International Electron Devices Meeting, 1993 (unpublished), p. 541.
2. K. Yano, T. Ishii, T. Hashimoto, T. Kobayashi, F. Murai, and K. Seki, IEEE Trans. Electron Devices 41, 1628 (1994).
3. Y. Takahashi, M. Nagase, H. Namatsu, K. Kurihara, K. Iwadate, Y. Nakajima, S. Horiguchi, K. Murase, and M. Tabe, IEEE International Electron Devices Meeting, 1994 (unpublished), p. 938.
4. A. Nakajima, T. Futatsugi, K. Kosemura, T. Fukano, and N. Yokoyama, IEEE International Electron Devices Meeting, 1996 (unpublished), p. 952.
5. A. Nakajima, H. Aoyama, and K. Kawamura, Jpn. J. Appl. Phys. 33, L1796 (1994).