A model for electromigration-induced degradation mechanisms in dual-inlaid copper interconnects

IEEE International Integrated Reliability Workshop Final Report

Volumn , Issue , 2004, Pages 79-85

  Sukharev, Valeriy ^a   Zschech, Ehrenfried ^b  

^a AGERE SYSTEMS   (United States)

^b IBM MICROELECTRONICS   (United States)

Author keywords

Electromigration; Interconnect; Interface; Simulation; Via; Void

Indexed keywords

COMPUTER SIMULATION; DEGRADATION; ELASTICITY; ELECTROMAGNETISM; ELECTROMIGRATION; GRAIN BOUNDARIES; HEAT TRANSFER; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; PARTIAL DIFFERENTIAL EQUATIONS; SCANNING ELECTRON MICROSCOPY;

INTERCONNECTS; INTERFACES; MASS BALANCE EQUATIONS; VIAS; VOIDS;

COPPER;

EID: 21744454120     PISSN: 19308841     EISSN: 23748036     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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