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Volumn , Issue , 2000, Pages 482-491

Fault tolerance through re-execution in multiscalar architecture

Author keywords

Dynamic configuration; Fault tolerance; Multiscalar architecture; Re execution; Static configuration; Time redundancy

Indexed keywords

MULTISCALAR ARCHITECTURE; RE-EXECUTION; TIME REDUNDANCY;

EID: 0034590713     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICDSN.2000.857579     Document Type: Conference Paper
Times cited : (40)

References (9)
  • 1
    • 0003684038 scopus 로고    scopus 로고
    • Design and evaluation of a multiscalar processor
    • PhD thesis, University of Wisconsin - Madison
    • S. E. Breach, Design and Evaluation Of A Multiscalar Processor, PhD thesis, University of Wisconsin - Madison, 1998.
    • (1998)
    • Breach, S.E.1
  • 2
    • 0003675845 scopus 로고
    • The multiscalar architecture
    • PhD thesis, University of Wisconsin-Madison
    • M. Franklin, The Multiscalar Architecture, PhD thesis, University of Wisconsin-Madison, 1993.
    • (1993)
    • Franklin, M.1
  • 4
    • 0030384866 scopus 로고    scopus 로고
    • Loop transformations for fault detection in regular loops on massively parallel systems
    • December
    • C. Gong, R. Melhem, and R. Gupta, "Loop transformations for fault detection in regular loops on massively parallel systems," IEEE Transactions on Parallel and Distributed Systems, vol. 7, No. 12, pp. 1238-1249, December 1996.
    • (1996) IEEE Transactions on Parallel and Distributed Systems , vol.7 , Issue.12 , pp. 1238-1249
    • Gong, C.1    Melhem, R.2    Gupta, R.3
  • 8
    • 0029531029 scopus 로고    scopus 로고
    • The microarchitecture of superscalar processors
    • December
    • J. E. Smith and G. Sohi, "The microarchitecture of superscalar processors," In Proceedings of the IEEE, pp. 1609-1624, December 1995.
    • Proceedings of the IEEE , pp. 1609-1624
    • Smith, J.E.1    Sohi, G.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.