Single-chip FPGA implementation of a cryptographic co-processor

Proceedings - 2004 IEEE International Conference on Field-Programmable Technology, FPT '04

Volumn , Issue , 2004, Pages 279-285

  Crowe, Francis ^a   Daly, Alan ^a   Kerins, Tim ^a   Marnane, William ^a  

^a UNIVERSITY COLLEGE CORK   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SOFTWARE; CRYPTOGRAPHY; DATA TRANSFER; ELECTRON MULTIPLIERS; ELECTRONIC DOCUMENT IDENTIFICATION SYSTEMS; MATHEMATICAL MODELS; OPTIMIZATION;

ARITHMETIC OPERATIONS; DATA SOURCE; HASH ALGORITHMS; TRANSPORT LAYER SECURITY (TLS);

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 20844458580     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)

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