An analytical threshold voltage model of NMOSFETs with hot-carrier induced interface charge effect

Microelectronics Reliability

Volumn 45, Issue 7-8, 2005, Pages 1144-1149

  Ho, C S ^a   Huang, Kuo Yin ^a   Tang, Ming ^a   Liou, Juin J ^b  

^a ProMOS Technologies Inc   (Taiwan)

^b University of Central Florida   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTRIC CHARGE; GATES (TRANSISTOR); HOT CARRIERS; INTERFACES (MATERIALS); MOS DEVICES; POISSON EQUATION; THRESHOLD VOLTAGE;

CHANNEL POTENTIAL; DRAIN-INDUCED BARRIER LOWERING (DIBL); INTERFACE CHARGE DISTRIBUTION; TECHNOLOGY-BASED COMPUTER-AIDED DESIGN (TCAD);

MOSFET DEVICES;

EID: 20344367041     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2004.10.007     Document Type: Article

References (12)

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