Architectural support for uniprocessor and multiprocessor active memory systems

IEEE Transactions on Computers

Volumn 53, Issue 3, 2004, Pages 288-307

  Kim, Daehyun ^a   Chaudhuri, Mainak ^a   Heinrich, Mark ^b   Speight, Evan ^a  

^a Cornell University ^*  (United States)

^b University of Central Florida   (United States)

Author keywords

Active memory systems; Address remapping; Cache coherence protocol; Distributed shared memory; Flexible memory controller architecture

Indexed keywords

CACHE MEMORY; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; DATA PROCESSING; DISTRIBUTED COMPUTER SYSTEMS; NETWORK PROTOCOLS;

ADDRESS REMAPPING; CACHE COHERENCE PROTOCOL; DISTRIBUTED SHARED MEMORY; FLEXIBLE MEMORY CONTROLLER ARCHITECTURE; MULTIPROCESSOR ACTIVE MEMORY SYSTEM; UNIPROCESSOR ACTIVE MEMORY SYSTEM;

STORAGE ALLOCATION (COMPUTER);

EID: 1842530872     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2004.1261836     Document Type: Article

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