Architectural implications of a family of irregular applications

IEEE High-Performance Computer Architecture Symposium Proceedings

Volumn , Issue , 1998, Pages 80-89

  O'Hallaron, David ^a   Shewchuk, Jonathan Richard ^a   Gross, Thomas ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; DATA COMMUNICATION SYSTEMS; MATRIX ALGEBRA; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS); TELECOMMUNICATION NETWORKS; VECTORS;

PROCESSING ELEMENT (PE); SPARSE MATRIX VECTOR PRODUCT (SMVP) OPERATIONS;

COMPUTER ARCHITECTURE;

EID: 0031605210     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)