Routability and fault tolerance of FPGA interconnect architectures

Proceedings - International Test Conference

Volumn , Issue , 2004, Pages 479-481

  Huang, Jing ^a   Tahoori, Mehdi Baradaran ^a   Lombardi, Fabrizio ^a  

^a Northeastern University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTERCONNECT ARCHITECTURES; INTERCONNECT FAULTS; PROGRAMMABLE SWITCHES; RELIABILITY OBTAINED BY ADAPTIVE RECONFIGURATION; SIGNAL ROUTING;

ALGORITHMS; ELECTRIC SWITCHES; MICROPROCESSOR CHIPS; PROBABILITY; RELIABILITY; SIGNAL PROCESSING;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 18144426826     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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