Realizing high test quality goals with smart test resource usage

Proceedings - International Test Conference

Volumn , Issue , 2004, Pages 525-533

  Gu, Xinli ^a   Wang, Cyndee ^a   Lee, Abby ^a   Eklow, Bill ^a   Tsai, Kun Han ^b   Tofte, Jan A ^b   Kassab, Mark ^b   Rajski, Janusz ^b  

^a CISCO SYSTEMS   (United States)

^b MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONSTRAINT THEORY; FAILURE ANALYSIS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; INTEGRATED CIRCUITS; OPTIMIZATION;

DEFECTS PER MILLION (DPM); DENSITY FUNCTIONAL THEORY (DFT); MEMORY BUILT-IN SELF-TEST (MBIST); TEST PROGRAMS;

BUILT-IN SELF TEST;

EID: 18144424442     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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