Future ICs go vertical

Semiconductor International

Volumn 28, Issue 2, 2005, Pages

  Garrou, Philip ^a  

^a MCNC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INFINEON (CO); THREE DIMENSIONAL (3-D) INTEGRATION; TOSHIBA (CO); ZIPTRONIX (CO);

BONDING; CHEMICAL MECHANICAL POLISHING; CHEMICAL VAPOR DEPOSITION; CHIP SCALE PACKAGES; DIELECTRIC MATERIALS; FLASH MEMORY; INTEGRATION; METALLIZING; MICROELECTROMECHANICAL DEVICES; PATENTS AND INVENTIONS; REACTIVE ION ETCHING; SILICON WAFERS; STATIC RANDOM ACCESS STORAGE; THREE DIMENSIONAL; WIRE;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 18144413062     PISSN: 01633767     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Review

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