Influence of an accumulation back-gate voltage on the low-frequency noise spectra of 0.13 μm fully-depleted SOI MOSFETs fabricated on ELTRAN and UNIBOND wafers

ESSCIRC 2004 - Proceedings of the 34th European Solid-State Device Research Conference

Volumn , Issue , 2004, Pages 357-360

  Lukyanchikova, N ^a   Garbar, N ^a   Smolanka, A ^a   Simoen, E ^b   Claeys, C ^b,c  

^a INSTITUTE OF SEMICONDUCTOR PHYSICS   (Ukraine)

^b IMEC   (Belgium)

^c UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC IMPEDANCE; INTERFACES (MATERIALS); MOSFET DEVICES; SILICON ON INSULATOR TECHNOLOGY; SPURIOUS SIGNAL NOISE;

ACCUMULATION BACK-GATE VOLTAGE; ELECTRON VALENCE BAND (EVB); LORENTZIANS; LOW-FREQUENCY NOISE SPECTRA;

ELECTRIC POTENTIAL;

EID: 17644370377     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

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2. W. Jin, P.C.H. Chan, S.K.H. Fung, and P.K. Ko, "Shot-noise-induced excess low-frequency noise in floating-body partially depleted SOI MOSFET's", IEEE Trans. Electron Devices, vol. 46, pp. 1180-1185, June 1999.
3. V. Dessard, B. Iňíguez, S. Adriaensen, and D. Flandre, "SOI n-MOSFET low-frequency noise measurements and modeling from room temperature up to 250°C," IEEE Trans. Electron Devices, vol. 49, pp. 1289-1295, July 2002.
4. F. Dieudonné, J. Jomaah, and F. Balestra, "Gate-induced floating body effect excess noise in partially depleted SOI MOSFETs," IEEE Electron Device Lett., vol. 23, pp. 737-739, Dec. 2002.
5. A. Mercha, E. Simoen, H. van Meer, and C. Claeys, "Low-frequency noise overshoot in ultrathin gate oxide silicon-on-insulator metal-oxide-semiconductor field-effect transistors," Appl Phys Lett., vol. 82, pp. 1790-1792, March 2003.
6. N.B. Lukyanchikova, M.V. Petrichuk, N.P. Garbar, A. Mercha, E. Simoen, and C. Claeys, "Electron Valence Band tunneling-induced Lorentzian noise in deep submicron Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors," J. Appl. Phys., vol. 94, pp. 4461-4469, Oct. 2003.
7. E. Simoen, A. Mercha, J.M. Raff, C. Claeys, N. Lukyanchikova, and N. Garbar, "Explaining the parameters of the electron valence band tunneling related Lorentzian noise in fully depleted SOI MOSFETs," IEEE Electron Device Lett., vol. 24, pp. 751-754, Dec. 2003.
8. N. Lukyanchikova, N. Garbar, A. Smolanka, E. Simoen, A. Mercha, and C. Claeys, "Short-channel effects in the Lorentzian noise induced by the EVB tunneling in partially-depleted SOI MOSFETs," Solid-State Electron., vol. 48, pp. 747-758, 2004.
9. N. Lukyanchikova, N. Garbar, A. Smolanka, E. Simoen and C. Claeys, "Excess Lorentzian noise in partially-depleted SOI nMOSFETs induced by an accumulation back-gate bias," submitted for publication in IEEE Electron Device Lett.