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Volumn 40, Issue 3, 2005, Pages 593-601

A CMOS 0.25-μm continuous-time FIR filter with 125 ps per tap delay as a fractionally spaced receiver equalizer for 1-Gb/s data transmission

Author keywords

Data communication; Equalization

Indexed keywords

ADAPTIVE ALGORITHMS; BANDWIDTH; CMOS INTEGRATED CIRCUITS; DATA COMMUNICATION SYSTEMS; DATA TRANSFER; EQUALIZERS; MICROPROCESSOR CHIPS; PRINTED CIRCUIT BOARDS; SIGNAL RECEIVERS;

EID: 16244406256     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2005.843623     Document Type: Article
Times cited : (19)

References (28)
  • 2
    • 0037344322 scopus 로고    scopus 로고
    • An adaptive PAM-4 5-Gb/s backplane transceiver in 0.25-μm CMOS
    • Mar.
    • J. T. Stonick, G.-Y. Wei, J. L. Sonntag, and D. K. Weinlader, "An adaptive PAM-4 5-Gb/s backplane transceiver in 0.25-μm CMOS," IEEE J. Solid-State Circuits, vol. 38, no. 3, pp. 436-443, Mar. 2003.
    • (2003) IEEE J. Solid-state Circuits , vol.38 , Issue.3 , pp. 436-443
    • Stonick, J.T.1    Wei, G.-Y.2    Sonntag, J.L.3    Weinlader, D.K.4
  • 3
    • 0036917305 scopus 로고    scopus 로고
    • A 6b 1.6 GS/s flash ADC in 0.18 μm CMOS using averaging termination
    • Dec.
    • P. Scholtens and M. Vertregt, "A 6b 1.6 GS/s flash ADC in 0.18 μm CMOS using averaging termination," IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1599-1609, Dec. 2002.
    • (2002) IEEE J. Solid-state Circuits , vol.37 , Issue.12 , pp. 1599-1609
    • Scholtens, P.1    Vertregt, M.2
  • 5
    • 77954491173 scopus 로고    scopus 로고
    • Designing a simple, small, wide-band and low-power equalizer for FR4 copper links
    • Santa Clara, CA
    • Maxim Integrated Products, "Designing a simple, small, wide-band and low-power equalizer for FR4 copper links," presented at the DesignCon, Santa Clara, CA, 2003.
    • (2003) DesignCon
    • Products, M.I.1
  • 6
  • 8
    • 0036474723 scopus 로고    scopus 로고
    • A CMOS transceiver for DRAM bus system with a demultiplexed equalization scheme
    • Feb.
    • J.-Y. Sim, J.-J. Nam, Y.-S. Sohn, H.-J. Park, C.-H. Kim, and S.-I. Cho, "A CMOS transceiver for DRAM bus system with a demultiplexed equalization scheme," IEEE J. Solid-State Circuits, vol. 37, no. 2, pp. 245-250, Feb. 2002.
    • (2002) IEEE J. Solid-state Circuits , vol.37 , Issue.2 , pp. 245-250
    • Sim, J.-Y.1    Nam, J.-J.2    Sohn, Y.-S.3    Park, H.-J.4    Kim, C.-H.5    Cho, S.-I.6
  • 9
    • 0141538244 scopus 로고    scopus 로고
    • 0.622-8.0 Gb/s 150 mW serial IO macrocell with fully flexible preemphasis and equalization
    • R. Farjad-Rad and H.-T. Ng, "0.622-8.0 Gb/s 150 mW serial IO macrocell with fully flexible preemphasis and equalization," in Symp. VLSI Circuits Dig. Tech. Papers, 2003, pp. 63-66.
    • (2003) Symp. VLSI Circuits Dig. Tech. Papers , pp. 63-66
    • Farjad-Rad, R.1    Ng, H.-T.2
  • 10
    • 0242443678 scopus 로고    scopus 로고
    • A 2.2 Gb/s CMOS look-ahead DFE receiver for multidrop channel with pin-to-pin time skew compensation
    • Y. Sohn, S. Bae, H. Park, C. Kim, and S. Cho, "A 2.2 Gb/s CMOS look-ahead DFE receiver for multidrop channel with pin-to-pin time skew compensation," in Proc. IEEE Custom Integrated Circuits Conf. (CICC), 2003, pp. 473-476.
    • (2003) Proc. IEEE Custom Integrated Circuits Conf. (CICC) , pp. 473-476
    • Sohn, Y.1    Bae, S.2    Park, H.3    Kim, C.4    Cho, S.5
  • 18
    • 0141538239 scopus 로고    scopus 로고
    • A CMOS 3.5 Gb/s continuous-time adaptive cable equalizer with joining adaptation method of low-frequency gain and high-frequency boosting
    • J. Choi, M. Hwang, and D. Jeong, "A CMOS 3.5 Gb/s continuous-time adaptive cable equalizer with joining adaptation method of low-frequency gain and high-frequency boosting," in Symp. VLSI Circuits Dig. Tech. Papers, 2003, pp. 103-106.
    • (2003) Symp. VLSI Circuits Dig. Tech. Papers , pp. 103-106
    • Choi, J.1    Hwang, M.2    Jeong, D.3
  • 19
    • 0038529366 scopus 로고    scopus 로고
    • A 0.13 μm CMOS 5-Gb/s 10-m 28 AWG cable transceiver with no-feedback-loop continuous-time post-equalizer
    • May
    • Y. Kudoh, M. Fukaishi, and M. Mizuno, "A 0.13 μm CMOS 5-Gb/s 10-m 28 AWG cable transceiver with no-feedback-loop continuous-time post-equalizer," IEEE J. Solid-State Circuits, vol. 38, no. 5, pp. 741-746, May 2003.
    • (2003) IEEE J. Solid-state Circuits , vol.38 , Issue.5 , pp. 741-746
    • Kudoh, Y.1    Fukaishi, M.2    Mizuno, M.3
  • 23
    • 0022435636 scopus 로고
    • Adaptive equalization
    • Sep.
    • S. Qureshi, "Adaptive equalization," Proc. IEEE, vol. 73, no. 9, pp. 1349-1387, Sep. 1985.
    • (1985) Proc. IEEE , vol.73 , Issue.9 , pp. 1349-1387
    • Qureshi, S.1
  • 24
    • 0023362199 scopus 로고
    • A 4-MHz CMOS continuous-time filter with on-chip automatic tuning
    • Jun.
    • F. Krummenacher and N. Joehl, "A 4-MHz CMOS continuous-time filter with on-chip automatic tuning," IEEE J. Solid-State Circuits, vol. 23, no. 3, pp. 750-758, Jun. 1988.
    • (1988) IEEE J. Solid-state Circuits , vol.23 , Issue.3 , pp. 750-758
    • Krummenacher, F.1    Joehl, N.2
  • 28
    • 0036292674 scopus 로고    scopus 로고
    • A high speed low-noise equalization technique with improved bit error rate
    • May
    • X. Lin, J. Liu, and J. Fonseka, "A high speed low-noise equalization technique with improved bit error rate," in Proc. IEEE Int. Symp. Circuits and Syst. (ISCAS), vol. 2, May 2002, pp. 564-567.
    • (2002) Proc. IEEE Int. Symp. Circuits and Syst. (ISCAS) , vol.2 , pp. 564-567
    • Lin, X.1    Liu, J.2    Fonseka, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.