In-line testing of antenna-type test structures for separation of sources of process-induced damage

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 3215, Issue , 1997, Pages 101-108

  Broz̀ek, Tomasz ^a,b   Roberts, Douglas ^a   Dao, Thuy ^a  

^a MOTOROLA INC   (United States)

^b MOTOROLA INC   (United States)

Author keywords

Antenna test structures; Gate oxide breakdown; In line testing; Plasma charging; Plasma enhanced CVD; Process induced damage

Indexed keywords

ANTENNA TEST STRUCTURES; CHARGING DAMAGES; GATE OXIDE BREAKDOWN; GATE OXIDE INTEGRITIES; IN-LINE TESTING; INDUCED CHARGING; MOS TRANSISTORS; OXIDE DEPOSITIONS; OXIDIZED SILICON WAFERS; PLASMA CHARGING; PLASMA PROCESSING; POTENTIAL SOURCES; PROCESS COMPLEXITIES; SALICIDATION; SUBSEQUENT ANALYSES; SURFACE CHARGE ANALYSIS; TYPE TESTS;

ANTENNAS; DIELECTRIC MATERIALS; ELECTROMAGNETIC INDUCTION; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; PLASMA DEPOSITION; PLASMA DIAGNOSTICS; PLASMAS; POLYSILICON; SEMICONDUCTING SILICON COMPOUNDS; SILICON WAFERS; TESTING; TRANSISTOR TRANSISTOR LOGIC CIRCUITS; TRANSISTORS;

PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION;

EID: 1542284779     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.284672     Document Type: Conference Paper

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