Using SEMATECH Electrical Test Structures in Assessing Plasma Induced Damage in Poly Etching

Japanese Journal of Applied Physics

Volumn 33, Issue 7S, 1994, Pages 4458-

  Chan, Y David ^a  

^a SEMATECH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; ANTENNAS; GATES (TRANSISTOR); MATHEMATICAL MODELS; MOS DEVICES; PASSIVATION; PLASMA APPLICATIONS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE STRUCTURES; STRESSES; SURFACES; TRANSISTORS;

CAPACITIVE ANTENNA STRUCTURES; ELECTRICAL TEST STRUCTURES; FOWLER NORDHEIM STRESS; GATE POLYSILICON ETCH; N CHANNEL METAL OXIDE SEMICONDUCTOR ANTENNA TRANSISTORS; PLASMA ETCHING; PLASMA INDUCED CHARGING DAMAGE; SEMATECH PROCESS INDUCED DAMAGE EFFECT REVEALER (SPIDER);

ETCHING;

EID: 0028460611     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.33.4458     Document Type: Article

References (6)

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