Asymmetric halo CMOSFET to reduce static power dissipation with improved performance

IEEE Transactions on Electron Devices

Volumn 52, Issue 3, 2005, Pages 397-405

  Bansal, Aditya ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

Band to band tunneling; Halo implants; MOSFET; NAND gate; NOR gate; Process variations

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; CURRENT DENSITY; ELECTRON TUNNELING; LEAKAGE CURRENTS; LOGIC GATES; NAND CIRCUITS; OPTIMIZATION; POISSON EQUATION; SEMICONDUCTOR DOPING; SEMICONDUCTOR JUNCTIONS;

BAND-TO-BAND TUNNELING; HALO IMPLANTS; NAND GATE; NOR GATE; PROCESS VARIATIONS;

MOSFET DEVICES;

EID: 15044352610     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.843969     Document Type: Article

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