Voltage dependent gate capacitance and its impact in estimating power and delay of CMOS digital circuits with low supply voltage

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 2000, Pages 228-230

  Nose, Koichi ^a   Chae, Soo Ik ^a   Sakurai, Takayasu ^a  

^a UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DELAY CIRCUITS; DIGITAL CIRCUITS; ELECTRIC POWER MEASUREMENT; GATES (TRANSISTOR); VOLTAGE CONTROL;

GATE CAPACITANCE;

CMOS INTEGRATED CIRCUITS;

EID: 0033645217     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/lpe.2000.155286     Document Type: Article

References (6)