Evaluating and designing the optimal 2D collector profile for a 300 GHz SiGe HBT

Materials Science in Semiconductor Processing

Volumn 8, Issue 1-3 SPEC. ISS., 2005, Pages 295-299

  Stricker, Andreas D ^a   Freeman, Gregory ^a   Khater, Marwan ^a   Rieh, Jae Sung ^a  

^a IBM MICROELECTRONICS   (United States)

Author keywords

Current distribution; Depletion zone; Device simulation; HBT; Hetero bipolar junction transistor; Implant optimization; Process simulation; Selectively implanted collector; SIC; SiGe; Silicon germanium; TCAD

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; MASKS; OPTIMIZATION; SCANNING ELECTRON MICROSCOPY; SECONDARY ION MASS SPECTROMETRY; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DOPING;

CURRENT DISTRIBUTION; DEPLETION ZONE; DEVICE SIMULATION; IMPLANT OPTIMIZATION; PROCESS SIMULATION; SELECTIVELY IMPLANTED COLLECTORS (SIC); SIGE; SILICON-GERMANIUM; TCAD;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 13244291691     PISSN: 13698001     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mssp.2004.09.087     Document Type: Conference Paper

References (12)

1. Luy JF. 79 GHz automotive electronics. International SiGe technology and device meeting (ISTDM 2004) proceedings vol. 1, 2004:6-8.
2. D.L. Harame, J.H. Comfort, J.D. Cressler, E.F. Crabbe, J.Y.C. Sun, B.S. Meyerson, and T. Tice Si/SiGe epitaxial base transistors. I. Materials, physics, and circuits and II. Process integration and analog applications IEEE Trans Electron Dev 42 3 1995 455 482
3. Freeman G, Greenberg DR, Walter K, Subbanna S. SiGe HBT performance improvements from lateral scaling. European solid-state device research conference (ESSDERC'99) proceedings, vol. 1. 1999:724-7.
4. S.J. Jeng, B. Jagannathan, J.S. Rieh, J.B. Johnson, K.T. Schonenberg, D.R. Greenberg, and A.D. Stricker A 210 GHz ft SiGe heterojunction bipolar transistor with a non-self-aligned (NSA) structure IEEE Electr Device Lett 22 11 2001 542 544
5. Rieh JS, Khater M, Schonenberg KT, Pagette F, Smith P, Adam TN, Stein K, Ahlgren D, Freeman G. Collector vertical scaling and performance tradeoffs in 300 GHz SiGe HBT's. Device research conference proceedings, vol. 1 2004: 235-6.
6. Johnson JB, Stricker AD, Joseph AJ, Slinkman JA. A Technology Simulation Methodology for AC-Performance Optimization of SiGe HBTs. International electron device meeting (IEDM) Proceedings, vol. 1, 2001:489-92.
7. Rieh JS, Jagannathan B, Chen H, Schonenberg KT, Angell D, Chinthakindi A, Florkey J, et al. SiGe HBTs with cut-off frequency of 350 GHz. International electron devices meeting (IEDM) Proceedings, vol. 1, 2002:771-4.
8. T in a Manufacturable Technology IEEE Electr Device Lett 23 5 2002 258 260
9. John Petrus, private communication.
10. P.M. Fahey, P.B. Griffin, and J.D. Plummer Point defects and dopant diffusion in silicon Rev Mod Phys 61 2 1989 289ff
11. Decoutere S, Sibaja-Hernandez A. SiGe:C HBTs: The TCAD challenge reduced to practice. International SiGe technology and device meeting (ISTDM 2004) Proceedings, vol. 1, 2004:67-8.
12. A.D. Stricker, J.B. Johnson, G. Freeman, and J.S. Rieh Design and optimization of a 200 GHz SiGe HBT collector profile by TCAD J Appl Surf Sci 224 1-4 2004 324 329