Resistive-open defects in embedded-SRAM core cells: Analysis and march test solution

Proceedings of the Asian Test Symposium

Volumn , Issue , 2004, Pages 266-271

  Dilillo, Luigi ^a   Girard, Patrick ^a   Pravossoudovitch, Serge ^a   Virazel, Arnaud ^a   Borri, Simone ^b   Hage Hassan, Magali ^b  

^a LIRMM   (France)

^b INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; ELECTRIC FIELD EFFECTS; INTERCONNECTION NETWORKS; MICROPROCESSOR CHIPS; RANDOM ACCESS STORAGE;

ELECTRICAL SIMULATION; MARCH TEST SOLUTION; READ DESTRUCTIVE FAULTS (RDF); SYSTEM OF CHIP (SOC);

DATA STORAGE EQUIPMENT;

EID: 13244271271     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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