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Volumn 1998-August, Issue , 1998, Pages 91-96

Integration of non-classical faults in standard March tests

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; DEGREES OF FREEDOM (MECHANICS); INTEGRATED CIRCUIT TESTING;

EID: 85007454746     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MTDT.1998.705953     Document Type: Conference Paper
Times cited : (53)

References (12)
  • 2
    • 0025403820 scopus 로고
    • Boundary-scan design principles for efficient LSSD ASIC testing
    • R. W. Bassett et al., "Boundary-scan design principles for efficient LSSD ASIC testing", IBM J. Res. Develop., vol. 34, no. 2/3, pp. 339-353, 1990
    • (1990) IBM J. Res. Develop , vol.34 , Issue.2-3 , pp. 339-353
    • Bassett, R.W.1
  • 9
    • 84893810610 scopus 로고    scopus 로고
    • March tests for word-oriented memories
    • A. J. van de Goor, I. B. S. Tlili, "March tests for word-oriented memories", Proc. DATE Conf., pp. 501-508, 1998
    • (1998) Proc. DATE Conf , pp. 501-508
    • Goor De Van, A.J.1    Tlili, I.B.S.2
  • 10
    • 0029735629 scopus 로고    scopus 로고
    • Test and Testability Techniques for Open Defects in RAM Address Decoders
    • M. Sachdev, "Test and Testability Techniques for Open Defects in RAM Address Decoders", Proc. European Design & Test Conf., pp. 428-434, 1996
    • (1996) Proc. European Design & Test Conf , pp. 428-434
    • Sachdev, M.1
  • 11
    • 0032312595 scopus 로고    scopus 로고
    • Detection of CMOS address decoder open faults with March and pseudo random testing
    • submitted for publication in
    • J. Otterstedt, D. Niggemeyer, T. W. Williams, "Detection of CMOS address decoder open faults with March and pseudo random testing", submitted for publication in Proc. Intl. Test Conf., 1998
    • (1998) Proc. Intl. Test Conf
    • Otterstedt, J.1    Niggemeyer, D.2    Williams, T.W.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.