Defect-based delay testing of resistive vias-contacts a critical evaluation

IEEE International Test Conference (TC)

Volumn , Issue , 1999, Pages 467-476

  Baker, Keith ^a   Gronthoud, Guido ^a   Lousberg, Maurice ^a   Schanstra, Ivo ^a   Hawkins, Charles ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DATA STORAGE EQUIPMENT; ENERGY GAP; FAILURE ANALYSIS; LINEAR INTEGRATED CIRCUITS; LOGIC GATES; MICROPROCESSOR CHIPS; OSCILLATORS (ELECTRONIC); QUALITY ASSURANCE;

DEFECT BASED DELAY TESTING; RESISTIVE VIAS CONTACTS; SCAN BASED TEST CHIP;

INTEGRATED CIRCUIT TESTING;

EID: 0033315399     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)