SPEAR: A hybrid model for speculative pre-execution

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2004 (Abstracts and CD-ROM)

Volumn 18, Issue , 2004, Pages 1067-1076

  Ro, Won W ^a   Gaudiot, Jean Luc ^b  

^a University of Southern California   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FETCH BANDWIDTH; PROGRAM BINARY; SPECULATIVE PRE-EXECUTION; SPECULATIVE PRE-EXECUTION ASSISTED BY COMPILER (SPEAR);

BANDWIDTH; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE; COMPUTER PROGRAMMING; DATA FLOW ANALYSIS; MICROPROCESSOR CHIPS; PROGRAM COMPILERS;

INFORMATION RETRIEVAL;

EID: 12444282716     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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