Slice-Processors: An implementation of operation-based prediction

Proceedings of the International Conference on Supercomputing

Volumn , Issue , 2001, Pages 321-334

  Moshovos, A ^a   Pnevmatikatos, D N ^a   Baniasadi, A ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; COMPUTATION THEORY; LOGIC DESIGN; STORAGE ALLOCATION (COMPUTER);

SLICE-PROCESSORS;

PROGRAM PROCESSORS;

EID: 0034819242     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

1. Simultaneous subordinate microthreading (SSMT)
2. Instruction path coprocessors
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4. Memorysystem design considerations for dynamically-scheduled processors
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6. The alpha 21264 architecture
7. Examination of a memory access classification scheme for pointer-intensive and numeric programs
8. Dependence based prefetching for linked data structures
9. Improving virtual function call target prediction via dependence-based precomputation
10. Speculative data-driven multithreading
11. Decoupled access/execute computer architectures
12. Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading processor
13. Understanding the backward slices of performance degrading instructions
14. Execution-based prediction using speculative slices