Mapping of regular nested loop programs to coarse-grained reconfigurable arrays - Constraints and methodology

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2004 (Abstracts and CD-ROM)

Volumn 18, Issue , 2004, Pages 2019-2026

  Hannig, Frank ^a   Dutta, Hritam ^a   Teich, Jürgen ^a  

^a UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ARRAYS; COMPUTER ARCHITECTURE; FIELD PROGRAMMABLE GATE ARRAYS; MATHEMATICAL MODELS; PROGRAM PROCESSORS; SEMICONDUCTOR MATERIALS; WIRELESS TELECOMMUNICATION SYSTEMS;

MAPPING APPLICATIONS; MAPPING METHODOLOGY; NESTED LOOP PROGRAMS; PERSONAL DIGITAL DEVICES;

COMPUTER PROGRAM LISTINGS;

EID: 12444252997     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (25)

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