A 4-GHz 300-mW 64-bit integer execution ALU with dual supply voltages in 90-nm CMOS

IEEE Journal of Solid-State Circuits

Volumn 40, Issue 1, 2005, Pages 44-50

  Mathew, Sanu K ^a   Anders, Mark A ^a   Bloechel, Brad ^a   Nguyen, Trang ^a   Krishnamurthy, Ram K ^a   Borkar, Shekhar ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Arithmetic and logic unit (ALU); Dual supply voltage design; Semi dynamic design; Sparse tree architecture

Indexed keywords

ADDERS; COMPUTATIONAL COMPLEXITY; ELECTRIC POTENTIAL; ELECTRIC POWER UTILIZATION; ENERGY EFFICIENCY; LOGIC GATES; MICROPROCESSOR CHIPS;

ARITHMETIC AND LOGIC UNIT (ALU); DUAL SUPPLY VOLTAGE DESIGN; SEMI-DYNAMIC DESIGN; SPARSE-TREE ARCHITECTURE;

CMOS INTEGRATED CIRCUITS;

EID: 11944260934     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.838019     Document Type: Conference Paper

References (10)

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