On the design of low-energy hybrid CMOS 1 -bit full adder cells

Midwest Symposium on Circuits and Systems

Volumn 2, Issue , 2004, Pages

  Goel, Sumeer ^a   Gollamudi, Shilpa ^a   Kumar, Ashok ^a   Bayoumi, Magdy ^a  

^a University of Louisiana at Lafayette   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDER CELLS; LOGIC EXPRESSION; SIGNAL INTEGRITY; STANDARD DESIGN;

ADDERS; COMPRESSORS; ELECTRIC BATTERIES; ELECTRIC POTENTIAL; ENERGY EFFICIENCY; OPTIMIZATION;

CMOS INTEGRATED CIRCUITS;

EID: 11144346222     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

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