Development of a new improved high performance flip chip BGA package

Proceedings - Electronic Components and Technology Conference

Volumn 2, Issue , 2004, Pages 1174-1180

  Chong, Desmond Y R ^a   Lim, B K ^a   Rebibis, Kenneth J ^a   Pan, S J ^a   Krishnamoorthi, S ^a   Kapoor, R ^a   Sun, Anthony Y S ^a   Tan, H B ^a  

^a United Test and Assembly Center Ltd   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

BGA PACKAGES; DIE JUNCTIONS; SEMICONDUCTOR PACKAGES; SIMULTANEOUS SWITCHING NOISE (SSN);

COMPUTER SIMULATION; DIELECTRIC MATERIALS; FATIGUE OF MATERIALS; FINITE ELEMENT METHOD; FLIP CHIP DEVICES; HEAT LOSSES; SEMICONDUCTOR JUNCTIONS; SIGNAL INTERFERENCE; SOLDERED JOINTS; THERMAL CYCLING; THERMAL LOAD;

CHIP SCALE PACKAGES;

EID: 10444282084     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. rd Electronic Components and Technology Conf, New Orleans, LA, May 2003, pp. 359-364.
2. nd Electronic Components and Technology Conf, 2002, pp. 611-616.
3. nd Electronic Components and Technology Conf, 2002, pp. 1114-1118.
4. st Electronic Components and Technology Conf, 2001, pp. 997-1002.
5. th Electronic Components and Technology Conf, 1998.
6. rd Electronic Components and Technology Conf, New Orleans, LA, May 2003, pp. 207-213.
7. th Electronics Packaging and Technology Conference, Singapore, Dec 2003, pp. 695-700.
8. th Electronic Components and Technology Conf, 2000, pp. 1048-1058.
9. J. Peiffer et al., "Electrical Performance Advantages of Ultra-Thin Dielectric Materials Used for Power-Ground Cores in High Speed", Multilayer Printed Circuit Boards, IPC Expo 2003, Long Beach, CA, March 25-27, 2003.