Network on chip simulations for benchmarking

Proceedings - 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, IWSOC 2004

Volumn , Issue , 2004, Pages 269-274

  Wiklund, Daniel ^a   Sathe, Sumant ^a   Liu, Dake ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

REGISTER TRANSFER LEVEL (RTL); SIMULATION FLOW; SIMULATION MODELS; SOCBUS NETWORKS;

BENCHMARKING; COMPUTER SIMULATION; CONGESTION CONTROL (COMMUNICATION); ELECTRIC NETWORK TOPOLOGY; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; QUALITY OF SERVICE; ROUTERS; SCHEDULING; TELECOMMUNICATION TRAFFIC;

INTERCONNECTION NETWORKS;

EID: 10444269476     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWSOC.2004.1319892     Document Type: Conference Paper

References (8)

1. Kees Goossens, J. van Meerbergen, A. Peeters, and P. Wielage, "Networks on silicon: Combining best-effort and guaranteed services," in Proceedings of the design automation and test conference, Mar. 2002.
2. William J. Dally and Brian Towles, "Route packets, not wires: On-chip interconnection networks," in Proc of the design automation conference (DAC), 2001.
3. Daniel Wiklund and Dake Liu, "Design of a system-on-chip switched network and its design support," in Proc of the Int'l conference on communications, circuits and systems (ICCCAS), June 2002.
4. Daniel Wiklund and Dake Liu, "Socbus: Switched network on chip for hard real time systems," in Proc of the Int'l Parallel and Distributed Processing Symposium (IPDPS), Apr. 2003.
5. Daniel Wiklund, An on-chip network architecture for hard real time systems, Licentiate thesis, Linköping Studies in Science and Technology, Jan. 2003, ISBN 91-7373-577-9.
6. Sumant Sathe, Daniel Wiklund, and Dake Liu, "Design of a switching node (router) for on-chip networks," in Proc of the ASI-CON 2003 conference, Oct. 2003.
7. Sumant Sathe, Daniel Wiklund, and Dake Liu, "Design of a low latency router for on-chip networks," in Submitted manuscript, 2004.
8. Santiago Gonzalez Pestana, Edwin Rijpkema, Andrei Radulescu, Kees Goossens, and Om Prakash Gangwal, "Cost-performance trade-offs in networks on chip: A simulation-based approach," in Proceedings of Design, Automation and Test in Europe Conference, Feb. 2004.