Design of a system-on-chip switched network and its design support

2002 International Conference on Communications, Circuits and Systems and West Sino Exposition, ICCCAS 2002 - Proceedings

Volumn 2, Issue , 2002, Pages 1279-1283

  Wiklund, D ^a   Liu, D ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

design flow; network; simulation; switch; System on chip

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DESIGN; NETWORKS (CIRCUITS); PROGRAMMABLE LOGIC CONTROLLERS; RECONFIGURABLE HARDWARE; SIMULATORS; SWITCHES; SWITCHING CIRCUITS; SYSTEM-ON-CHIP;

DESIGN AND IMPLEMENTATIONS; DESIGN FLOWS; DESIGN SUPPORT; GAIN PERFORMANCE; INTERCONNECT NETWORKS; ON CHIP COMMUNICATION; SIMULATION; WIRE DELAYS;

INTEGRATED CIRCUIT DESIGN;

EID: 84976509876     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCCAS.2002.1179016     Document Type: Conference Paper

References (6)

1. Wingard, "Fully-pipelined fixed-latency communications system with a real time dynamic bandwidth allocation," US Patent 5948089, 1999.
2. D. Wiklund and D. Liu, "Switched interconnect for system-on-a-chip designs," in Proc of the IP2000 Europe conference, 2000.
3. W. J. Dally and B. Towles, "Route packets, not wires: On-chip interconnection networks," in Proc of the DAC, 2001.
4. M. Sgroi et al., "Addressing the system-on-chip interconnect woes through communication-based design," in Proc of the DAC, 2001.
5. C. Svensson, "Electrical interconnects revitalized," in http://www.ek.isy.liu.se/~christer/CSPapers.htm, 2001.
6. F. Mu and C. Svensson, "Self-tested self-synchronization circuit for mesochronous clocking," IEEE Transactions on Circuits and Systems, vol. 48, no. 2, pp. 129-140, 2001.