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1
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0742310586
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Interfacial adhesion of copper-low k interconnects
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4-6 June
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E. Andideh, T. Scherban, B. Sun, J. Blaine, C. Block, B. Jin, "Interfacial adhesion of copper-low k interconnects", Proceedings of the IEEE 2001 International Interconnect Technology Conference, 4-6 June 2001, pp.257-259.
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(2001)
Proceedings of the IEEE 2001 International Interconnect Technology Conference
, pp. 257-259
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Andideh, E.1
Scherban, T.2
Sun, B.3
Blaine, J.4
Block, C.5
Jin, B.6
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2
-
-
84961752354
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Cohesive strength characterization of brittle low-k films
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3-5 June
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G. Xu, E. Andideh, J. Bielefeld, T. Scherban, "Cohesive strength characterization of brittle low-k films", Proceedings of the IEEE 2002 International Interconnect Technology Conference, 3-5 June 2002, pp. 57-59.
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(2002)
Proceedings of the IEEE 2002 International Interconnect Technology Conference
, pp. 57-59
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-
Xu, G.1
Andideh, E.2
Bielefeld, J.3
Scherban, T.4
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3
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3042557048
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Packaging effects on reliability of Cu/low k interconnects
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Accepted for future publication
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G. Wang, J.-H. Zhao, S. Groothuis, P. S. Ho, "Packaging Effects on Reliability of Cu/low k Interconnects", Transactions on Device and Materials Reliability, Accepted for future publication, 2003.
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(2003)
Transactions on Device and Materials Reliability
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Wang, G.1
Zhao, J.-H.2
Groothuis, S.3
Ho, P.S.4
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4
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0742303701
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Impact of flip-chip packaging on copper/low-k structures
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Accepted for future publication
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Lei L. Mercado, Shun-Meen Kuo, Cindy Goldberg, Darrel Frear, "Impact of Flip-Chip Packaging on Copper/Low-k Structures", Transactions on Advanced Packaging, Accepted for future publication, 2003.
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(2003)
Transactions on Advanced Packaging
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Mercado, L.L.1
Kuo, S.-M.2
Goldberg, C.3
Frear, D.4
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5
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0037675719
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Pb-free solder challenges in electronic packaging and assembly
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2003, 53rd, May 27-30
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F. Hua, "Pb-free solder challenges in electronic packaging and assembly", Proceedings of Electronic Components and Technology Conference, 2003, 53rd, May 27-30, 2003, pp.58-63.
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(2003)
Proceedings of Electronic Components and Technology Conference
, pp. 58-63
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Hua, F.1
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6
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0035797072
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Tin - Lead (SnPb) solder reaction in flip chip technology
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K. N. Tu, K. Zeng, "Tin - lead (SnPb) solder reaction in flip chip technology", Materials Science and Engineering, R 34, 2001, pp. 1-58.
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(2001)
Materials Science and Engineering
, vol.R 34
, pp. 1-58
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Tu, K.N.1
Zeng, K.2
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7
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0029359516
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A test chip design for detecting thin film cracking in integrated circuits
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Aug.
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Stephen A. Gee et al., "A Test Chip Design for Detecting Thin Film Cracking in Integrated Circuits", IEEE Transactions on Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, Volume 18, Issue 3, Aug. 1995, pp.478-484.
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(1995)
IEEE Transactions on Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging
, vol.18
, Issue.3
, pp. 478-484
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Gee, S.A.1
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9
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0033326202
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Die cracking and reliable die design for flip-chip assemblies
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November
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Stylianos Michaelides and Suresh K. Sitaraman, "Die Cracking and Reliable Die Design for Flip-Chip Assemblies", IEEE Transaction on Advanced Packaging, Vol. 22, No. 4, November 1999, pp.602-613.
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(1999)
IEEE Transaction on Advanced Packaging
, vol.22
, Issue.4
, pp. 602-613
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Michaelides, S.1
Sitaraman, S.K.2
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10
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3042848834
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Investigation of interfaces with analytical tools
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Accepted for future publication
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R. Dias, "Investigation of Interfaces with Analytical Tools", Transactions on Device and Materials Reliability, Accepted for future publication, 2003
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(2003)
Transactions on Device and Materials Reliability
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Dias, R.1
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11
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84862482264
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"Integrated circuit failure analysis by low energy charge-induced voltage alteration", US patent 5523694
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Edward I. Cole, "Integrated circuit failure analysis by low energy charge-induced voltage alteration", US patent 5523694.
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-
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Cole, E.I.1
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12
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84862478151
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"Light induced voltage alteration for integrated circuit analysis", US patent 5430305
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Edward I. Cole, Jerry M. Soden, "Light induced voltage alteration for integrated circuit analysis", US patent 5430305.
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-
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Cole, E.I.1
Soden, J.M.2
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13
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0026213994
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Short and long loop manufacturing feedback using a multisensor assembly test chip
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September
-
James N. Sweet, Melanie R. Tuck, David W. Peterson and David W. Palmer, "Short and long loop manufacturing feedback using a multisensor assembly test chip", IEEE Transactions on Components, hybrids, and manufacturing technology, Vol. 14, No.3, September, 1991,pp.529-535.
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(1991)
IEEE Transactions on Components, Hybrids, and Manufacturing Technology
, vol.14
, Issue.3
, pp. 529-535
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Sweet, J.N.1
Tuck, M.R.2
Peterson, D.W.3
Palmer, D.W.4
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15
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0033352439
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In-situ stress state measurements during chip-on-board assembly
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January
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Yida Zhou, Jeffery C. Suhling, R. Wayne Johnson and Richard C. Jaeger, "In-situ stress state measurements during chip-on-board assembly", IEEE Transactions on Electronic Packaging, Vol.22, No.1, January 1999, pp.38-52.
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(1999)
IEEE Transactions on Electronic Packaging
, vol.22
, Issue.1
, pp. 38-52
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Zhou, Y.1
Suhling, J.C.2
Wayne Johnson, R.3
Jaeger, R.C.4
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16
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0033907557
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CMOS stress sensors on (100) Silicon
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January
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Richard C. Jaeger, Jeffery C. Suhling, Ramannathan Ramani, Arthur T, Bradley and Jianping Xu, "CMOS stress sensors on (100) Silicon", IEEE Journal of Solid-state Circuits, Vol.35, No.1, January 2000, pp.38-52.
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(2000)
IEEE Journal of Solid-state Circuits
, vol.35
, Issue.1
, pp. 38-52
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Jaeger, R.C.1
Suhling, J.C.2
Ramani, R.3
Bradley, A.T.4
Xu, J.5
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