The state-of-art and future trends in testing embedded memories

Records of the IEEE International Workshop on Memory Technology, Design and Testing

Volumn , Issue , 2004, Pages 54-59

  Hamdioui, Said ^a   Gaydadjiev, Georgi ^a   Van De Goor, Ad J ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED MEMORIES; FAULT MODELING; FAULTY CHIPS; SYSTEM ON CHIPS (SOC);

ALGORITHMS; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; FAULT TOLERANT COMPUTER SYSTEMS; MICROPROCESSOR CHIPS; SEMICONDUCTOR MATERIALS;

EMBEDDED SYSTEMS;

EID: 10044230601     PISSN: 10874852     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MTDT.2004.1327984     Document Type: Conference Paper

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