Super-Scaled InP HBTs for 150 GHz Circuits

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2003, Pages 709-712

  Zolper, John C ^a  

^a DEFENSE ADVANCED RESEARCH PROJECTS AGENCY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MIXED SIGNAL FIGURE OF MERIT (MSFOM); SIGNAL CIRCUITS;

CAPACITANCE; COMPUTER SIMULATION; DIGITAL INTEGRATED CIRCUITS; ELECTRIC RESISTANCE; ENERGY GAP; FLIP FLOP CIRCUITS; HEAT LOSSES; ION IMPLANTATION; METALLIZING; SEMICONDUCTING INDIUM PHOSPHIDE; SEMICONDUCTOR JUNCTIONS;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 0842288184     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

1. K. Murata, K. Sano, H. Kitabayashi, S. Sugitani, H. Sugahara and T. Enoki, "100-Gbit/s Logic IC using 0.1-μm-gate-length InAlAs/InGaAs/InP HEMTs," late news IEDM-02.
2. max = 375/210 GHz," Indium Phosphide and Related Materials, Santa Barbara, CA, 12-16 May 2003, p. 374 (2003).
3. J. C. Zolper, "Challenges and Opportunities for InP HBT Mixed Signal Circuit Technology," IPRM-03, p. 8 (2003).
4. M. J. W. Rodwell, M. Ureaga, Y. Betser, T. Mathew, P. Krishnan, D. Scott, S. Jaganathan, D. Mensa, J. Guthrie, R. Pullela, Q. Lee, B. Agarwal, U. Bhattacharya, and S. Long, "Scaling of InGaAs/AlInAs HBT's for High Speed Mixed Signal and mm-Wave ICs," Int. Journal of High Speed Electron. And Systems, 11, 159 (2001).
5. max InP/InGaAs Double Heterojunction Bipolar Transistors with a Thin Psuedomorphic Base," IEEE Tran. Elec. Dev Lett., 23, 694 (2002).
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7. D. Scott, M. Urteaga, N. Parthasarathy, J, H, English, and M. J. W. Rodwell, "Molecular Beam Deposition of Low-Resistance Polycrystalline InAs" Proc. IEEE Lester Eastman Conf. On High Performance Devices, 6-8 August 2003, Newark, DE, p. 207 (2002).
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9. A. Gutierrez-Aitken, E. Kaneshiro, B. Tang, J. Notthoff, P. Chin, and A. Oki, "69 GHz frequency divider with a cantilevered base InP DHBT," Int. Elect. Dev. Meet. Tech. Dig. 1999, p. 779 (1999).
10. M. Sokolich, M.Y. Chen, D.H. Chow, Y. Royter, S. Thomas III, C.H. Fields, D.A. Hitko, B. Shi, M. Montes, S.S. Bui, Y.K. Boegeman, A. Arthur, J. Duvall, R. Martinez, T. Hussain, R.D. Rajavel, J.C. Li, K. Elliott, J.D. Thompson, "InP HBT Integrated Circuit Technology with Selectively Implanted Subcollector and Regrown Device Layers," GaAs IC Symposium 2003 (in press).
11. M. Dahlström, Z. Griffith, M. Urteaga, M.J.W. Rodwell, "InGaAs/InP DHBT's with > 370 GHz ft and fmax using a Graded Carbon-Doped Base," Device Res. Conf. 2003, Salt Lake City, Utah (2003).
12. Private communication, Minh Lee, Vitesse Semiconductor Inc.
13. See for example: M. Sokolich, C. H. Fields, S. Thomas III, B. Shi, Y. K. Boegeman, M. Montes, R. Martinez, A. R. Kramer, and M. Madhav, "A Low-Power 72.8 GHz Static Frequency Divider in AlInAs/InGaAs HBT Technology," IEEE J. Solid-State Circuits, 36, 1328 (2001).
14. K. Washio, E. Ohue, R. Hayami, A. Kodama, H. Shimamoto, M. Miura, K. Oda, I. Suzumura, T. Tominari, T. Hashimoto, "Ultra-High-Speed Scaled-down Self-aligned SEG SiGe HBTs," IEDM-02, p. 767 (2002).
15. M. Mokhtari, C. Fields, R.D. Rajavel, "100+ GHz Static Divide-by-2 Circuit in InP DHBT Technology," GaAs IC Digest 2002, 291 (2002).
16. N. K. Srivastava, G. Raghavan, R. Thiagarajah, M.G. Case, E. Arnold, C.W. Pobanz, S. O. Nielsen, J. C. Yen, R. A. Johnson, "InP HBT Ring Oscillator with 2.0 ps/stage Gate Delay," GaAs IC Digest 2002, 171 (2002).