A game theoretic approach for power optimization during behavioral synthesis

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 11, Issue 6, 2003, Pages 1031-1043

  Murugavel, Ashok K ^a   Ranganathan, Nagarajan ^a  

^a University of South Florida   (United States)

Author keywords

Behavioral synthesis; Binding; Economic models; Game theory; Power optimization; Scheduling

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; ELECTRIC NETWORK SYNTHESIS; GAME THEORY; INTEGER PROGRAMMING; INTEGRATED CIRCUIT LAYOUT; LINEAR PROGRAMMING; MATHEMATICAL MODELS; OPTIMIZATION; VLSI CIRCUITS;

BEHAVIORAL SYNTHESIS; BINDING ALGORITHM; NASH EQUILIBRIUM; POWER CONSUMPTION; SCHEDULING ALGORITHM;

ELECTRIC POWER SUPPLIES TO APPARATUS;

EID: 0742269289     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2003.819566     Document Type: Article

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