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Volumn 1, Issue , 1998, Pages 83-90

Operation binding and scheduling for low power using constraint logic programming

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; COMPUTER PROGRAMMING LANGUAGES; HIGH LEVEL SYNTHESIS; SCHEDULING;

EID: 84888996591     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EURMIC.1998.711781     Document Type: Conference Paper
Times cited : (8)

References (16)
  • 2
    • 0029293575 scopus 로고
    • Minimizing power consumption in digital CMOS circuits
    • April
    • A.P.Chandrakasan, R.W.Brodersen, "Minimizing Power Consumption in Digital CMOS Circuits," Proceedings of the IEEE, Vol. 83, No. 4, April 1995.
    • (1995) Proceedings of the IEEE , vol.83 , Issue.4
    • Chandrakasan, A.P.1    Brodersen, R.W.2
  • 7
    • 0026903189 scopus 로고
    • Predicting system-level area and delay for pipelined and nonpipelined designs
    • August
    • R.Jain, A.C.Parker, N.Park, "Predicting System-Level Area and Delay for Pipelined and Nonpipelined Designs," IEEE Transactions on CAD, Vol. 11, No. 8, August 1992.
    • (1992) IEEE Transactions on CAD , vol.11 , Issue.8
    • Jain, R.1    Parker, A.C.2    Park, N.3
  • 8
    • 0030656668 scopus 로고    scopus 로고
    • Embedded system synthesis by timing constraints solving
    • Antwerp, Belgium, September
    • K.Kuchcinski, "Embedded System Synthesis by Timing Constraints Solving," Proceedings of ISSS'97, Antwerp, Belgium, September 1997.
    • (1997) Proceedings of ISSS'97
    • Kuchcinski, K.1
  • 9
    • 33644594635 scopus 로고    scopus 로고
    • An approach to high-level synthesis using constraint logic programming
    • Vasteras, Sweden, August
    • K.Kuchcinski, "An Approach to High-Level Synthesis Using Constraint Logic Programming," Proc. of the 24th Euromicro Conference, Vasteras, Sweden, August 1998.
    • (1998) Proc. of the 24th Euromicro Conference
    • Kuchcinski, K.1
  • 11
    • 0000577173 scopus 로고
    • SALSA: A new approach to scheduling with timing constraints
    • August
    • J. Nestor, G. Krishnamoorthy, "SALSA: A New Approach to Scheduling with Timing Constraints," IEEE Transactions on CAD, Vol. 12, No. 8, August 1993.
    • (1993) IEEE Transactions on CAD , vol.12 , Issue.8
    • Nestor, J.1    Krishnamoorthy, G.2
  • 13
    • 0029516527 scopus 로고
    • An iterative improvement algorithm for low power data path synthesis
    • A.Raghunathan, N.K.Jha, "An Iterative Improvement Algorithm for Low Power Data Path Synthesis," ICCAD 1995.
    • (1995) ICCAD
    • Raghunathan, A.1    Jha, N.K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.