Power-optimal simultaneous buffer insertion/sizing and wire sizing

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2003, Pages 581-586

  Li, Ruiming ^a   Zhou, Dian ^a   Liu, Jin ^a   Zeng, Xuan ^b  

^a The University of Texas at Dallas   (United States)

^b FUDAN UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER INSERTION; POWER DISSIPATION;

CAPACITANCE; COMPUTER SIMULATION; ELECTRIC RESISTANCE; PROBLEM SOLVING; THEOREM PROVING; VLSI CIRCUITS;

COMPUTER AIDED DESIGN;

EID: 0348040111     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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