Synthesis of Heterogeneous Distributed Architectures for Memory-intensive Applications

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2003, Pages 46-53

  Huang, Chao ^a   Ravi, Srivaths ^b   Raghunathan, Anand ^b   Jha, Niraj K ^a  

^a Princeton University   (United States)

^b NEC LABORATORIES AMERICA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INFINITE IMPULSE RESPONSE (IIR); MEMORY PARTITIONING;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ARRAYS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; CONTROL SYSTEM SYNTHESIS; DISTRIBUTED COMPUTER SYSTEMS; IMPULSE RESPONSE; LOGIC GATES; OPTIMIZATION; STATIC RANDOM ACCESS STORAGE;

COMPUTER AIDED LOGIC DESIGN;

EID: 0347409243     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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