Synthesis of application-specific memory designs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 5, Issue 1, 1997, Pages 101-111

  Schmit, Herman ^a,b   Thomas, Donald E ^a,b  

^a IEEE   (United States)

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Behavioral synthesis; Memory synthesis; Simulated annealing

Indexed keywords

ARRAYS; DATA STRUCTURES; ELECTRIC WIRE; PERFORMANCE; SIMULATED ANNEALING; STORAGE ALLOCATION (COMPUTER);

BEHAVIORAL SYNTHESIS; MEMORY SYNTHESIS;

LOGIC DESIGN;

EID: 0031099182     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.555990     Document Type: Article

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