Automatic code mapping on an intelligent memory architecture

IEEE Transactions on Computers

Volumn 50, Issue 11, 2001, Pages 1248-1266

  Solihin, Yan ^a   Lee, Jaejin ^b   Torrellas, Josep ^a  

^a University of Illinois at Urbana Champaign   (United States)

^b UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

Adaptive execution; Compilers; Heterogeneous system; Intelligent memory architecture; Performance prediction; Processing in memory

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTER ARCHITECTURE; MAPPING; MULTIPROCESSING SYSTEMS; PROGRAM COMPILERS; PROGRAM PROCESSORS;

GENERIC INTELLIGENT MEMORY SYSTEMS;

DATA STORAGE EQUIPMENT;

EID: 0035511092     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.966498     Document Type: Article

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